| ID |
Date |
Author |
Project |
Measurement Type |
Object ID |
Subject |
Text |
 |
|
43
|
Tue May 19 14:48:06 2015 |
Hao Yin | Belle II | module | L6 Noise inJection Runs | L6 Noise inJection Runs | Folder "L6_RLC_Test"
Configuration file: /mnt/data/ITA_NOISE_TESTS/L6_RLC_Test/SinglePeak_3Fadc.cfg
3 Tests: Injkection to 2.5V 1.25V. |
|
|
51
|
Mon Nov 30 15:12:19 2015 |
Hao Yin | | | | FIR_ADC config | FIR filter and ADC delay test:
ADC delay and FIR filter with and
without cooling to reproduce error detected |
|
|
53
|
Mon Nov 30 17:11:17 2015 |
Hao Yin | Belle II | module | FIRRun001 | FIRRun001 aft ADC_HOT | FirRun 20 min after I2C |
|
|
39
|
Tue May 19 10:57:19 2015 |
Hao Yin | Belle II | system | FIR | FIR filter | first fir filter run:
# 1:[0x[FADC ID] in hex], 2:[APV25
ChannelNr], 3-10:[fir coef in float] |
|
|
38
|
Tue May 19 10:08:53 2015 |
Hao Yin | | | | FADC system setup success | 3 FADC. All Channel/APV25 running (except
L3 n first and last -> not connected (bonding))
n-side: all connectors |
|
|
47
|
Mon May 25 10:38:03 2015 |
Hao Yin | Belle II | system | L5 Ladder Emission Test | Emission | (TestNr: 16)
base line noise measurement are
saved in SYSTEM_CHECK_AFTER_WE. |
|
|
41
|
Tue May 19 13:23:16 2015 |
Hao Yin | Belle II | system | Calibration | CalibrationRun001 | PedestalRun001, FIRRun001,
room temperature,
no noise injection |
|
|
46
|
Fri May 22 12:01:32 2015 |
Hao Yin | | | | CMC injection LV 10V | Comparison w/o filter (LC) connected to
-z_n side.
Mateo has the results. |
|
|
52
|
Mon Nov 30 15:18:12 2015 |
Hao Yin | Belle II | module | ADC_DELAY_HOT | ADC delay hot | ADC delay scan at room temp and 20 min
after APV I2C config.
measured values at display in the |
|
|
48
|
Mon May 25 20:27:23 2015 |
Hao Yin | Belle II | system | Caen PS base line measurements | | Baseline noise measurements wo injection.
measure noise in both HV and LV.
wings of APV25 using cmc with 128 |
|
|
49
|
Wed May 27 09:30:54 2015 |
Hao Yin | Belle II | system | CAEN PS Primary side | | Measured Primary side of caen wo load (setup
attachment 2 and prelimilary res. attachment
1. ) |
|
|
54
|
Mon Nov 30 17:13:47 2015 |
Hao Yin | Belle II | system | PedestalRun | | ADC Hot, FIRRun001
room temp pedrun |
|
|
55
|
Mon Nov 30 17:23:51 2015 |
Hao Yin | Belle II | system | HardwareRun001 | | ADC Hot, FIRRun001, PedestalRun001
room temp pedrun
target: BW |
|
|
56
|
Mon Nov 30 17:47:54 2015 |
Hao Yin | Belle II | system | HardwareRun002 | | ADC Hot, FIRRun001, PedestalRun001
target: -Z
room temp pedrun |
|
|
57
|
Mon Nov 30 18:32:13 2015 |
Hao Yin | Belle II | system | ADC Delay Scan Cold | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns) |
|
|
58
|
Mon Nov 30 18:44:04 2015 |
Hao Yin | Belle II | system | FIRRun_Cold | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns)
|
|
|
59
|
Mon Nov 30 18:45:49 2015 |
Hao Yin | Belle II | system | PedestalRun_Cold | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001
|
|
|
60
|
Mon Nov 30 18:49:23 2015 |
Hao Yin | Belle II | system | Hardware_Cold | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001
target: -Z |
|
|
61
|
Mon Nov 30 19:01:54 2015 |
Hao Yin | Belle II | system | Hardware_Cold | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001
Temp = 0°C |
|
|
62
|
Mon Nov 30 19:48:05 2015 |
Hao Yin | Belle II | system | Hardware_Room_With_Cold_I2C | | ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001
with room temp i2c config |
|