| ID |
Date |
Author |
Project |
Subject |
Run Number |
Events |
StartTime |
EndTime |
Data |
|
20
|
Mon Nov 17 23:04:57 2014 |
Hao Yin | Belle SVD | PedestalRun_002 | | 10338 | Mon Nov 17 23:03:03 CET 2014 | | Unknown |
Pedestal run at room temperature.
6 subevents. Noise reference run.
Delay as latest run.
Reference run for bad strips. |
|
21
|
Tue Nov 18 01:03:18 2014 |
Hao Yin | Belle SVD | Remapped FADC inputs | | | Tue Nov 18 01:03:32 CET 2014 | | Unknown |
We moved the second cable to the third connector on the FADC to match DESY testbeam conditions. |
|
22
|
Tue Nov 18 01:05:04 2014 |
Hao Yin | Belle SVD | PedestalRun_003 | | | Tue Nov 18 01:03:32 CET 2014 | | Unknown |
New pedestal run after switching the connectors.
At room temperature |
|
24
|
Tue Nov 18 09:48:53 2014 |
Hao Yin | Belle SVD | PedestalRun_004 | | 10000 | Tue Nov 18 09:48:30 CET 2014 | | Unknown |
At room temperature.
Old delay settings and FIRRun_002
|
|
25
|
Tue Nov 18 09:51:11 2014 |
Hao Yin | | CalibrationRun_002 | | | Tue Nov 18 09:50:24 CET 2014 | | Unknown |
At room temperature
PedestalRun004
Latest delay settings and FIRRun |
|
26
|
Tue Nov 18 10:12:25 2014 |
Hao Yin | Belle SVD | 6let PedestalRun_005 | | 10000 | Tue Nov 18 10:11:45 CET 2014 | | Unknown |
At room temperature
Latest delay, FIRRun002.
Check for bad strips. |
|
27
|
Tue Nov 18 10:26:56 2014 |
Hao Yin | Belle SVD | CalibrationRun_003 | | | Tue Nov 18 10:26:52 CET 2014 | | Unknown |
At room temperature
Latest delay and FIRRun |
|
28
|
Tue Nov 18 12:35:32 2014 |
Axel König | common | Infineon (4 modules) TLU Settings | | | | | Unknown |
- VNC to 192.168.0.18
- In command line: cd C:\Users\telescope\eudaq\bin
- TLUControl.exe.exe -d 2 -a 11 - i RJ45
Operating with AIDA telescope: TLUControl.exe.exe -d 3 -a 11 - i RJ45
Dut Position (left to right): 11, 06, 05, 07 |
|
32
|
Tue Nov 18 18:45:01 2014 |
Hao Yin | Belle SVD | Trigger Delay scan | | | Tue Nov 18 18:21:50 CET 2014 | | Unknown |
At room temperature
First run was at: 23 (no track)
TimingRun_001:
Trigger delay: 26
TimingRun_002:
Trigger delay: 29
TimingRun_003:
Trigger delay: 32
TimingRun_004:
Trigger delay: 20
TimingRun_005:
Trigger delay: 17
TimingRun_005:
Trigger delay: 14
Trigger chip delay: 110
|
|
33
|
Tue Nov 18 20:26:12 2014 |
Hao Yin | Belle SVD | HardwareRun_001 | | | Tue Nov 18 18:21:50 CET 2014 | | Unknown |
At room temperature
Latest ADC scan and FIR run.
Latest CAL.
Position: 0.0, see elog entry. |
|
35
|
Tue Nov 18 20:42:18 2014 |
Benedikt Würkner | Belle SVD | Coordinates of the DUT | | | | | Unknown |
We set the coordinates trying to put the beam in an area with well working APVs
Peak of course differs for n and p sensors due to their different pitch.
L4-6 n-side Peak around strip 180
L4&6 p-side mean value around strip 380
L5 p-side moved by 4.8mm due to reasons (APV misalignment I think) therefore the peak of the same measurements is moved by 4.8/75µm = 64 strips therefore centered around strip 320
The coordinates of the x-y table were set to 0:0 at this point. Refer to Run Alignment2 for reference data. |
|
39
|
Wed Nov 19 16:24:25 2014 |
Axel König | common | Running EUDAQ | | | | | Unknown |
Windows PC at Telescope:
0.) JTAG Programming: Chose a threshold file (recommended threshold 5) File: M26TB_Cern_2011.thresh5.mcf--> press start
1.) C:\Users\telescope\Desktop\users\BelleII --> start Mimosa 26 Telescope --> select all six Mimosa's
2.) C:\Users\telescope\Desktop\users\BelleII --> start startEudaq_fullWindows.bat
3.) Use configuration file hephy1 (location: C:\eudaq\conf). Change it according to your TLU settings (DUT mask, AND mask, etc.)
4.) configure
5.) start
x) Online monitor in preparation
Files: Are saved in C:\eudaq\data with internal numbering "run000000xxx.raw" (look at the date and time). [You can connect locally to this folder at HEPHY-SVD PC] |
|
42
|
Wed Nov 19 20:04:53 2014 |
Hao Yin | Belle SVD | PedestalRun_006 | | | | | Unknown |
Temperature: See attachment
FIRFilterRun_002
Layer 3-n side deactivated, because Hao broke it. |
| Attachment 1: Temp_19-11-14.PNG
|
 |
|
43
|
Wed Nov 19 20:07:05 2014 |
Hao Yin | Belle SVD | HardwareRun_002 | | | | | Unknown |
Multi-6 cooled.
See latest Noise, and PedestalRun.
|
|
46
|
Wed Nov 19 22:25:29 2014 |
Hao Yin | Belle SVD | PedestalRun_008 [CheckLayout] | | | | | Unknown |
cooled (temperature see attachment latest noise run),
latest Noise, FIR settings with the right layout mapping. |
|
47
|
Wed Nov 19 22:59:24 2014 |
Hao Yin | Belle SVD | CalibrationRun_004 | | | | | Crap |
cooled (see last calibration run)
Latest noise, FIRfilter settings.
Failed due to VME read timeout. |
|
48
|
Wed Nov 19 23:15:50 2014 |
Hao Yin | Belle SVD | HardwareRun_003 | | | | | Unknown |
cooled, latest noise, cal, PedestalRun.
Rawmode |
|
49
|
Wed Nov 19 23:31:08 2014 |
Hao Yin | Belle SVD | HardwareRun_004 | | | | | Unknown |
Same as HardwareRun_003 but with ZS. |
|
50
|
Thu Nov 20 00:52:50 2014 |
Hao Yin | Belle SVD | FIRRun_002 | | | | | Unknown |
cooled with new delay run |
|
51
|
Thu Nov 20 00:54:21 2014 |
Hao Yin | Belle SVD | PedestalRun_008 | | | | | Unknown |
temp see attachment (von flo)
10000
latest fir filter (002) |