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  Belle/Infineon/AIDA testbeam at SPS in Nov 2014  Not logged in ELOG logo
Message ID: 21     Entry time: Tue Nov 18 01:03:18 2014
Author: Hao Yin 
Project: Belle SVD 
Subject: Remapped FADC inputs 
Run Number:  
StartTime: Tue Nov 18 01:03:32 CET 2014 
Data: Unknown 

We moved the second cable to the third connector on the FADC to match DESY testbeam conditions. 

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