 Mon Nov 30 17:23:51 2015, Hao Yin, Belle II, system, HardwareRun001, 
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ADC Hot, FIRRun001, PedestalRun001
room temp pedrun
target: BW |
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Mon Nov 30 17:47:54 2015, Hao Yin, Belle II, system, HardwareRun002,
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ADC Hot, FIRRun001, PedestalRun001
target: -Z
room temp pedrun |
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Mon Nov 30 18:32:13 2015, Hao Yin, Belle II, system, ADC Delay Scan Cold,
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| ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns) |
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Mon Nov 30 18:44:04 2015, Hao Yin, Belle II, system, FIRRun_Cold,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns)
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Mon Nov 30 18:45:49 2015, Hao Yin, Belle II, system, PedestalRun_Cold,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
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Mon Nov 30 18:49:23 2015, Hao Yin, Belle II, system, Hardware_Cold,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
target: -Z
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Mon Nov 30 19:01:54 2015, Hao Yin, Belle II, system, Hardware_Cold,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
Temp = 0°C
target: CE |
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Mon Nov 30 19:48:05 2015, Hao Yin, Belle II, system, Hardware_Room_With_Cold_I2C,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
with room temp i2c config
Temp = 0°C |
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Mon Nov 30 20:06:15 2015, Hao Yin, Belle II, system, Hardware_Room_With_Cold_I2C,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
with room temp i2c config
Temp = room |
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Mon Nov 30 20:16:37 2015, Hao Yin, Belle II, system, Hardware_Room_With_Cold_I2C,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
ADC delay shifted by 3 (1.5ns) all sensors
with room temp i2c config |
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Mon Nov 30 20:27:42 2015, Hao Yin, Belle II, system, Hardware_Room_With_Cold_I2C,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
ADC shifted by 5 (2.5ns) all sensors
with room temp i2c config |
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Mon Nov 30 22:35:41 2015, Hao Yin, Belle II, system, Hardware_Room_With_Cold_I2C,
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ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001
ADC shifted by 9 (4.5ns) all sensors
with room temp i2c config |
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Wed Apr 30 16:52:17 2008, Markus Friedl, BELLE Upgrade, module, micron, micron sensor glued to frame
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soeben haben wir den micron-DSSD (double metal layer) in den 2-teiligen rahmen geklebt und auf beiden seiten
temporäre kapton-stückerln aufgeklebt, über die bias appliziert werden kann. nach trocknung und bonden der
bias-verbindungen (montag, 5.5.2008) wird dieser für sensor-tests zur verfügung stehen. |
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Tue May 20 14:27:50 2008, Markus Friedl, BELLE Upgrade, source, micron, analysis results of source test 9x
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*** NOTE: AFTER THIS MEASUREMENT WE REALIZED THAT BIASING WAS NOT DONE PROPERLY
HENCE THE RESULTS BELOW ARE NOT RELIABLE
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Wed Oct 7 14:23:35 2009, Dieter Uhl, BELLE Upgrade, hybrid, #4, hybrid-pitchadapter
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opens at upper coat
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Wed Oct 7 14:24:06 2009, Dieter Uhl, BELLE Upgrade, hybrid, #5, hybrid-pitchadapter
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shorts at upper coat
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Sun Jul 4 05:48:36 2010, Christian Irmler, BELLE Upgrade, source, Origami 6 - module 1, run002: first analysis results 7x
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Run name: run002
Run type: 0 (Hardware (Normal Run)) |
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Tue May 19 09:31:50 2015, Hao Yin, , , , Noise Test ITA
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Everything works except L3 p-side.
The config file is shown in the following:
### Original Configuration File Name: /home/katsuro/tuxdaq_devel/config/delay_scan.latency_scan.cfg ### |
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Tue May 19 10:08:53 2015, Hao Yin, , , , FADC system setup success
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3 FADC. All Channel/APV25 running (except L3 n first and last -> not connected (bonding))
n-side: all connectors
p-side: 0x01: 1, 2, 4 and 0x02, 1 with L3 p and L4 p (Telescope) |
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Tue May 19 13:42:04 2015, Hao Yin, , , , L6 Noise inJection Setup
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Test Nr. 1:
RLC between DockBox and Hybrid (both side).
Preliminary Test on L6, but all other sensors are connected. |
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