Home Clean room MedAustron HEPHY testbeams old
electronics module assembly SiDDaTA
  HEPHY logbook of the Electronics Group, Page 3 of 4  Not logged in ELOG logo
ID Date Author Projectdown Measurement Type Object ID Subject Text Attachments
  55   Mon Nov 30 17:23:51 2015 Hao YinBelle IIsystemHardwareRun001 ADC Hot, FIRRun001, PedestalRun001

room temp pedrun

target: BW
 Room_bw_n.pngRoom_bw_p.png 
  56   Mon Nov 30 17:47:54 2015 Hao YinBelle IIsystemHardwareRun002 ADC Hot, FIRRun001, PedestalRun001

target: -Z

room temp pedrun
 Room_-z_n.pngRoom_-z_p.png 
  57   Mon Nov 30 18:32:13 2015 Hao YinBelle IIsystemADC Delay Scan Cold ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns)
  
  58   Mon Nov 30 18:44:04 2015 Hao YinBelle IIsystemFIRRun_Cold ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns)

 
  
  59   Mon Nov 30 18:45:49 2015 Hao YinBelle IIsystemPedestalRun_Cold ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

 
  
  60   Mon Nov 30 18:49:23 2015 Hao YinBelle IIsystemHardware_Cold ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

target: -Z
 Cold_-z_n.pngCold_-z_p.png 
  61   Mon Nov 30 19:01:54 2015 Hao YinBelle IIsystemHardware_Cold ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

Temp = 0°C
 Cold_ce_n.pngCold_ce_p.png 
  62   Mon Nov 30 19:48:05 2015 Hao YinBelle IIsystemHardware_Room_With_Cold_I2C ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

with room temp i2c config
 RoomTemp_with_cold_config_ce_p.pngRoomTemp_with_cold_config_ce_n.png 
  63   Mon Nov 30 20:06:15 2015 Hao YinBelle IIsystemHardware_Room_With_Cold_I2C ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

with room temp i2c config
 RoomTemp_with_cold_config_-z_p.pngRoomTemp_with_cold_config_-z_n.png 
  64   Mon Nov 30 20:16:37 2015 Hao YinBelle IIsystemHardware_Room_With_Cold_I2C ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

ADC delay shifted by 3 (1.5ns)
 RoomTemp_with_cold_config_-z_p_3.pngRoomTemp_with_cold_config_-z_n_3.png 
  65   Mon Nov 30 20:27:42 2015 Hao YinBelle IIsystemHardware_Room_With_Cold_I2C ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

ADC shifted by 5 (2.5ns) all sensors
 RoomTemp_with_cold_config_-z_p_5.pngRoomTemp_with_cold_config_-z_n_5.png 
  67   Mon Nov 30 22:35:41 2015 Hao YinBelle IIsystemHardware_Room_With_Cold_I2C ADC Cold diff to hot: 1-3 adc delay config
(max 1.5 ns), FIRRun_Cold_001

ADC shifted by 9 (4.5ns) all sensors
 RoomTemp_with_cold_config_-z_p_9.pngRoomTemp_with_cold_config_-z_n_9.png 
  5   Wed Apr 30 16:52:17 2008 Markus FriedlBELLE Upgrademodulemicronmicron sensor glued to framesoeben haben wir den micron-DSSD (double metal
layer) in den 2-teiligen rahmen geklebt und
auf beiden seiten
  
  14   Tue May 20 14:27:50 2008 Markus FriedlBELLE Upgradesourcemicronanalysis results of source test
*** NOTE: AFTER THIS MEASUREMENT WE REALIZED
THAT BIASING WAS NOT DONE PROPERLY
 9x 
  15   Wed Oct 7 14:23:35 2009 Dieter UhlBELLE Upgradehybrid#4hybrid-pitchadapteropens at upper coat
 pitchadapter4_lower_coat.gifpitchadapter4_lower_coat_opens.gifpitchadapter4_upper_coat.gifpitchadapter4_upper_coat_opens.gif 
  16   Wed Oct 7 14:24:06 2009 Dieter UhlBELLE Upgradehybrid#5hybrid-pitchadaptershorts at upper coat
 pitchadapter5_lower_coat_opens.gifpitchadapter5_lower_coat.gifpitchadapter5_upper_coat_opens.gifpitchadapter5_upper_coat.gif 
  17   Sun Jul 4 05:48:36 2010 Christian IrmlerBELLE UpgradesourceOrigami 6 - module 1run002: first analysis resultsRun name: run002

Run type: 0 (Hardware (Normal Run))
 7x 
  37   Tue May 19 09:31:50 2015 Hao Yin   Noise Test ITAEverything works except L3 p-side.

The config file is shown in the
following:
  
  38   Tue May 19 10:08:53 2015 Hao Yin   FADC system setup success3 FADC. All Channel/APV25 running (except
L3 n first and last -> not connected (bonding))

n-side: all connectors
  
  42   Tue May 19 13:42:04 2015 Hao Yin   L6 Noise inJection SetupTest Nr. 1:

RLC between DockBox and Hybrid
(both side).
 P1000702.JPGP1000700.JPGP1000699.JPGP1000703.JPGP1000707.JPG 
ELOG V3.1.4-966e3dd