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  Belle/Infineon/AIDA testbeam at SPS in Nov 2014, Page 4 of 6  Not logged in ELOG logo
Entry  Thu Nov 20 15:32:33 2014, Hao Yin, , HardwareRun, 010, , , , Crap 

same as hardware run 009

FIFO FULL ERROR starting at ~event 5000

Entry  Thu Nov 20 11:14:19 2014, Benedikt Würkner, , HardwareRun_009, 009, , , , Crap 

 cooling see attachment of FIRRun003

Ped 009

Cal 005

Multi 6 raw mode

L5_n_side out of order

 

FIFO_FULL_ERROR starting at ~2000 events

Entry  Thu Nov 20 11:13:44 2014, Hao Yin, , HardwareRun_008, 008, , , , Crap 

cooled see attachment in FIRRun_003

PedestalRun_009

CalibrationRun_005

zerosuppressed

Entry  Thu Nov 20 10:41:54 2014, Benedikt Würkner, Belle SVD, CalibrationRun_005, , , , , Unknown 

 cooled see appendix (FIRRun_003)

PedestalRun_009

Entry  Thu Nov 20 10:39:13 2014, Benedikt Würkner, Belle SVD, PedestalRun_009, , , , , Unknown 

cooled see appendix (FIRRun003)

MaxEvents 10000

 

Entry  Thu Nov 20 10:39:11 2014, Benedikt Würkner, Belle SVD, PedestalRun_009, , , , , Unknown 

cooled see appendix (FIRRun003)

MaxEvents 10000

 

Entry  Thu Nov 20 10:33:13 2014, Benedikt Würkner, Belle SVD, FIRRun and Delay Scan, 003, , , , Unknown Temp_19-11-14.PNG

 Cooled see appendix

with new layout (l3_n-side channels changed and reactivated).

Latest FIRRun

Entry  Thu Nov 20 10:22:17 2014, Markus Friedl, Belle SVD, common, , , , , Unknown 
  1. Some VME errors occured over night
  2. Optical fiber changed
  3. Situation improved

 

  1. L3n hybrid could not be configured by I2C
  2. Plugged cable into the former FWDn slot
  3. Fully working

 

Entry  Thu Nov 20 00:55:14 2014, Hao Yin, Belle SVD, HardwareRun_007, , , , , Unknown 

temp cooled see attachment

last noise run(007)

FIRRun_002

PedestalRun_008

new cal run Raw, test with put fifo full flags

Entry  Thu Nov 20 00:54:21 2014, Hao Yin, Belle SVD, PedestalRun_008, , , , , Unknown 

temp see attachment (von flo)
10000
latest fir filter (002)

Entry  Thu Nov 20 00:52:50 2014, Hao Yin, Belle SVD, FIRRun_002, , , , , Unknown 

cooled with new delay run

Entry  Wed Nov 19 23:31:08 2014, Hao Yin, Belle SVD, HardwareRun_004, , , , , Unknown 

Same as HardwareRun_003 but with ZS.  

Entry  Wed Nov 19 23:15:50 2014, Hao Yin, Belle SVD, HardwareRun_003, , , , , Unknown 

cooled, latest noise, cal, PedestalRun.

Rawmode

Entry  Wed Nov 19 22:59:24 2014, Hao Yin, Belle SVD, CalibrationRun_004, , , , , Crap 

cooled (see last calibration run)

Latest noise, FIRfilter settings. 

 

Failed due to VME read timeout.

Entry  Wed Nov 19 22:25:29 2014, Hao Yin, Belle SVD, PedestalRun_008 [CheckLayout], , , , , Unknown 

cooled (temperature see attachment latest noise run),

latest Noise, FIR settings with the right layout mapping.

Entry  Wed Nov 19 22:15:41 2014, Axel König, Infineon, hardware run, Infineon_run010, 1498709, , , Unknown 

Infineon new stack - batch 4 

 
single hit
 
HV=300V, total I = 4.0200 µA
 
strips vertical
 
Table Position: H: 92.5mm V: 81mm
 
EUDAQ data: Run951 and Run952
 
data file in L:\cern14\infineon\Infineon Run vert
 
config file l:\cern14\infineon\Infineon Run horiz\cern14_infineon_multi6.cfg
 
-- stopped 20.11 / 09:35-- 
 
SVD3DAQ Events: 1498709
EUDAQ Events: 2777
 
EUDAQ stopped counting events --> log entry: "01:38 6-ERROR unexpected trigger number 277714 (expecting 277713)" (TLU Producer)
Entry  Wed Nov 19 21:56:44 2014, Axel König, Infineon, hardware run, Infineon_run008, 244167, , , Unknown 

Infineon new stack - batch 4 

single hit
 
HV=300V, total I = 4.0758 µA
 
strips vertical
 
Table Position: H: 92.5mm V: 81mm
 
data file in L:\cern14\infineon\Infineon Run vert
 
config file l:\cern14\infineon\Infineon Run horiz\cern14_infineon_single.cfg
 
--stopped 19.11 // 21:53 --
Reason: Want to run the eudaq for the next run
Events: 244167
Entry  Wed Nov 19 20:07:05 2014, Hao Yin, Belle SVD, HardwareRun_002, , , , , Unknown 

Multi-6 cooled.

See latest Noise, and PedestalRun.

 

Entry  Wed Nov 19 20:04:53 2014, Hao Yin, Belle SVD, PedestalRun_006, , , , , Unknown Temp_19-11-14.PNG

Temperature: See attachment

FIRFilterRun_002

Layer 3-n side deactivated, because Hao broke it.

Entry  Wed Nov 19 18:20:29 2014, Axel König, Infineon, calibration run, Infineon_run007_cal, , , , Unknown 
 
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