Thu Nov 20 16:13:18 2014, Hao Yin, Belle SVD, HardwareRun, 011, , , , Crap
|
cooled see appendix (FirRun003)
PedestalRun_009
multi 6 Raw Mode
FIFO size increased
FIFO FULL at event ~27000 |
Thu Nov 20 22:11:06 2014, Hao Yin, Belle SVD, HardwareRun, 012, , , , Good
|
cooled see appendix (FirRun003)
PedestalRun_009
multi 6 Raw Mode
FIFO size increased |
Fri Nov 21 15:02:28 2014, Benedikt Würkner, Belle SVD, HardwareRun, 013, 1433, , , Unknown
|
cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)
Zero_suppressed |
Fri Nov 21 15:03:08 2014, Benedikt Würkner, Belle SVD, HardwareRun, 014, 989, , , Unknown
|
cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)
Zero_suppressed |
Fri Nov 21 15:07:24 2014, Benedikt Würkner, Belle SVD, HardwareRun, 019, 150948, 2014-11-21 02:41:55, 2014-11-21 10:11:02, Unknown
|
cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)
VME Error, overnight run |
Fri Nov 21 19:05:27 2014, Hao Yin, Belle SVD, FIRRun_004, , , Fri Nov 21 19:05:23 CET 2014, , Unknown
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New ADC delay scan. cooled, -25 temperature
|
Fri Nov 21 19:10:09 2014, Hao Yin, Belle SVD, CalibrationRun_006, , , , , Unknown
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cooled, latest ADC delay scan and FIRRun. |
Sat Nov 22 11:16:26 2014, Markus Friedl, Belle SVD, cooling, , , , , Unknown
|
Cooling box plant hung up (I2C error on Alix, persistent after reboot)
Power-cycled cooling plant, now working
Slowly cooling down again |
Sat Nov 22 11:37:16 2014, Benedikt Würkner, Belle SVD, HardwareRun, 036, 450378, 2014-11-22 1:00:00, 2014-11-22 10:27:54, Unknown
|
Not completely cooled since cooling failed at 1:42 in the night
Bias voltage set to +-60V
Some error with event no17 or 18 leading to the data not being easily analysable requiring a hack in TuxOA
Pedestal_013 (cooled)
Noisefile: HardwareRun_036.noi |
Sat Nov 22 15:31:49 2014, Hao Yin, Belle SVD, HardwareRun, 038, 43788, 2014-11-22 15:18:40, , Unknown
|
Cooled down to -20
Bias voltage set to +-60V
Pedestal_013 (cooled)
Noisefile: HardwareRun_036.noi
Zero suppressed |
Sun Nov 23 01:05:43 2014, Hao Yin, Belle SVD, HardwareRun, 039, 20000, 2014-11-22 15:18:40, , Crap
|
Cooled down to -20
Bias voltage set to +-80V
Pedestal_013 (cooled)
Noisefile: HardwareRun_036.noi
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Sun Nov 23 01:37:42 2014, Hao Yin, Belle SVD, HardwareRun, 040, 20000, 2014-11-23 01:37:00, , Unknown
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Bias voltage set to +-80V
Pedestal_015 (cooled)
"New" layout with no cooling (CO2 is no more)
Newly set values for APC Delay
New FIR Run 005
Temperature around 30 C
Bias: +-80V |
Sun Nov 23 09:49:00 2014, Markus Friedl, Belle SVD, cooling, , , , , Unknown
|
Saturday evening, the cooling became unstable which indicates the end of the CO2 supply, possibly having a mixture of liquid and gas phases.
Strange oscillations observed for the DUT temperatures until the MF valve was finally turned off close to midnight.
|
Sun Nov 23 10:32:41 2014, Hao Yin, Belle SVD, PedestalRun, 016, 10000, , , Unknown
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Pedestal Run
room temperature (30C)
Bias scans planned |
Sun Nov 23 10:51:49 2014, Hao Yin, Belle SVD, HardwareRun, 042, 76863, , , Unknown
|
Hardware Run +-40V Bias
Room Temperature
Pedestal 016
Zero Suppressed |
Sun Nov 23 12:17:59 2014, Benedikt Würkner, Belle SVD, HardwareRun, 044, 20000, , , Unknown
|
Hardware Run +-30V Bias
Room Temperature
Pedestal 017 (again marked all the bad strips)
Zero Suppressed |
Sun Nov 23 12:55:47 2014, Benedikt Würkner, Belle SVD, HardwareRun, 045, 20000, , , Unknown
|
Hardware Run +-50V Bias
Room Temperature
Pedestal 018 (again marked all the bad strips)
Zero Suppressed |
Sun Nov 23 15:07:54 2014, Markus Friedl, Belle SVD, common, , , , , Unknown
|
Geometry setup of FW/BW:
(all dimensions are in mm and refer to the sensor planes) |
Sun Nov 23 15:09:53 2014, Markus Friedl, Belle SVD, PedestalRun, 001, 10000, , , Good
|
Initial pedestal run with SVD3 setup and WedgeOld, FW993, BW993 (reading out 4 chips on every p-side) |
Sun Nov 23 15:10:42 2014, Markus Friedl, Belle SVD, CalibrationRun, 001, 83400, , , Good
|
Initial calibration run with SVD3 setup and WedgeOld, FW993, BW993 (reading out 4 chips on every p-side) |
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