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  Belle/Infineon/AIDA testbeam at SPS in Nov 2014, Page 3 of 6  Not logged in ELOG logo
New entries since:Thu Jan 1 01:00:00 1970
Entry  Tue Nov 18 10:12:25 2014, Hao Yin, Belle SVD, 6let PedestalRun_005, , 10000, Tue Nov 18 10:11:45 CET 2014, , Unknown 

At room temperature

Latest delay, FIRRun002. 

Check for bad strips.

Entry  Tue Nov 18 10:26:56 2014, Hao Yin, Belle SVD, CalibrationRun_003, , , Tue Nov 18 10:26:52 CET 2014, , Unknown 

At room temperature

Latest delay and FIRRun 

Entry  Tue Nov 18 18:45:01 2014, Hao Yin, Belle SVD, Trigger Delay scan, , , Tue Nov 18 18:21:50 CET 2014, , Unknown 

At room temperature

First run was at: 23 (no track)

 

TimingRun_001:

Trigger delay: 26

 

TimingRun_002:

Trigger delay: 29

 

TimingRun_003:

Trigger delay: 32


 

TimingRun_004:

Trigger delay: 20

 
 

TimingRun_005:

Trigger delay: 17

 

TimingRun_005:

Trigger delay: 14
Trigger chip delay: 110

 

 

 

Entry  Tue Nov 18 20:26:12 2014, Hao Yin, Belle SVD, HardwareRun_001, , , Tue Nov 18 18:21:50 CET 2014, , Unknown 

At room temperature

Latest ADC scan and FIR run.

Latest CAL.

 

Position: 0.0, see elog entry.

Entry  Tue Nov 18 20:42:18 2014, Benedikt Würkner, Belle SVD, Coordinates of the DUT, , , , , Unknown 

We set the coordinates trying to put the beam in an area with well working APVs

Peak of course differs for n and p sensors due to their different pitch.

L4-6 n-side Peak around strip 180

L4&6 p-side mean value around strip 380

L5 p-side moved by 4.8mm due to reasons (APV misalignment I think) therefore the peak of the same measurements is moved by 4.8/75µm = 64 strips therefore centered around strip 320

The coordinates of the x-y table were set to 0:0 at this point. Refer to Run Alignment2 for reference data.

Entry  Wed Nov 19 20:04:53 2014, Hao Yin, Belle SVD, PedestalRun_006, , , , , Unknown Temp_19-11-14.PNG

Temperature: See attachment

FIRFilterRun_002

Layer 3-n side deactivated, because Hao broke it.

Entry  Wed Nov 19 20:07:05 2014, Hao Yin, Belle SVD, HardwareRun_002, , , , , Unknown 

Multi-6 cooled.

See latest Noise, and PedestalRun.

 

Entry  Wed Nov 19 22:25:29 2014, Hao Yin, Belle SVD, PedestalRun_008 [CheckLayout], , , , , Unknown 

cooled (temperature see attachment latest noise run),

latest Noise, FIR settings with the right layout mapping.

Entry  Wed Nov 19 22:59:24 2014, Hao Yin, Belle SVD, CalibrationRun_004, , , , , Crap 

cooled (see last calibration run)

Latest noise, FIRfilter settings. 

 

Failed due to VME read timeout.

Entry  Wed Nov 19 23:15:50 2014, Hao Yin, Belle SVD, HardwareRun_003, , , , , Unknown 

cooled, latest noise, cal, PedestalRun.

Rawmode

Entry  Wed Nov 19 23:31:08 2014, Hao Yin, Belle SVD, HardwareRun_004, , , , , Unknown 

Same as HardwareRun_003 but with ZS.  

Entry  Thu Nov 20 00:52:50 2014, Hao Yin, Belle SVD, FIRRun_002, , , , , Unknown 

cooled with new delay run

Entry  Thu Nov 20 00:54:21 2014, Hao Yin, Belle SVD, PedestalRun_008, , , , , Unknown 

temp see attachment (von flo)
10000
latest fir filter (002)

Entry  Thu Nov 20 00:55:14 2014, Hao Yin, Belle SVD, HardwareRun_007, , , , , Unknown 

temp cooled see attachment

last noise run(007)

FIRRun_002

PedestalRun_008

new cal run Raw, test with put fifo full flags

Entry  Thu Nov 20 10:22:17 2014, Markus Friedl, Belle SVD, common, , , , , Unknown 
  1. Some VME errors occured over night
  2. Optical fiber changed
  3. Situation improved

 

  1. L3n hybrid could not be configured by I2C
  2. Plugged cable into the former FWDn slot
  3. Fully working

 

Entry  Thu Nov 20 10:33:13 2014, Benedikt Würkner, Belle SVD, FIRRun and Delay Scan, 003, , , , Unknown Temp_19-11-14.PNG

 Cooled see appendix

with new layout (l3_n-side channels changed and reactivated).

Latest FIRRun

Entry  Thu Nov 20 10:39:11 2014, Benedikt Würkner, Belle SVD, PedestalRun_009, , , , , Unknown 

cooled see appendix (FIRRun003)

MaxEvents 10000

 

Entry  Thu Nov 20 10:39:13 2014, Benedikt Würkner, Belle SVD, PedestalRun_009, , , , , Unknown 

cooled see appendix (FIRRun003)

MaxEvents 10000

 

Entry  Thu Nov 20 10:41:54 2014, Benedikt Würkner, Belle SVD, CalibrationRun_005, , , , , Unknown 

 cooled see appendix (FIRRun_003)

PedestalRun_009

Entry  Thu Nov 20 16:13:18 2014, Hao Yin, Belle SVD, HardwareRun, 011, , , , Crap 

cooled see appendix (FirRun003)

PedestalRun_009

multi 6 Raw Mode

FIFO size increased

 

 

FIFO FULL at  event ~27000

ELOG V3.1.5-fc6679b