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  HEPHY logbook for testbeam at SPS June 2008  Not logged in ELOG logo
Message ID: 5     Entry time: Fri May 9 15:29:28 2008
Author: Thomas Bergauer 
Project: SiLC 
Subject: Sensor Layout 
Run Number:  
Events:  
StartTime:  
EndTime:  
  pplus strip number of
  width intermediate
strips [µm] strips
16 6 no
16 10 no
16 12.5 no
16 15 no
16 20 no
16 25 no
16 6 single
16 7.5 single
16 10 single
16 12.5 single
16 15 single
16 17.5 single
16 6 double
16 7.5 double
16 10 double
16 12.5 double

Stephan: weil ichs immer hier suche hab ich das Wafer Layout file geadded ;-)

Attachment 1: test-AC-2.pdf  41 kB  | Hide | Hide all
test-AC-2.pdf
Attachment 2: 070516-SiLC_WaferLayout.pdf  3.883 MB  Uploaded Wed May 20 15:42:12 2009  | Hide | Hide all
070516-SiLC_WaferLayout.pdf 070516-SiLC_WaferLayout.pdf 070516-SiLC_WaferLayout.pdf 070516-SiLC_WaferLayout.pdf 070516-SiLC_WaferLayout.pdf
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