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  Belle/Infineon/AIDA testbeam at SPS in Nov 2014, Page 4 of 6  Not logged in ELOG logo
New entries since:Thu Jan 1 01:00:00 1970
Entry  Thu Nov 20 10:33:13 2014, Benedikt Würkner, Belle SVD, FIRRun and Delay Scan, 003, , , , Unknown Temp_19-11-14.PNG

 Cooled see appendix

with new layout (l3_n-side channels changed and reactivated).

Latest FIRRun

Entry  Sun Nov 23 15:13:37 2014, Markus Friedl, Belle SVD, HardwareRun, 003, 100600, 23.11.2014 14:07:23, 23.11.2014 16:51:27, Good 

Hardware run, hitting APVs 0/1 on p-sides, 1/2 on n-sides

EUDAT telescope running with difference of 2 events

Entry  Sun Nov 23 16:55:37 2014, Markus Friedl, Belle SVD, HardwareRun, 004, 60600, 23.11.2014 16:51:49, 23.11.2014 18:23:54, Good 

Hardware run, hitting APVs 1/2 on p-sides, 1/2 on n-sides

EUDAT telescope running with difference of 2 events

Entry  Sun Nov 23 18:26:54 2014, Markus Friedl, Belle SVD, HardwareRun, 005, 60600, 23.11.2014 18:24:34, 23.11.2014 , Good 

Hardware run, hitting APVs 2/3 on p-sides, 1/2 on n-sides

EUDAT telescope running with difference of 2 events

Entry  Thu Nov 20 11:13:44 2014, Hao Yin, , HardwareRun_008, 008, , , , Crap 

cooled see attachment in FIRRun_003

PedestalRun_009

CalibrationRun_005

zerosuppressed

Entry  Thu Nov 20 11:14:19 2014, Benedikt Würkner, , HardwareRun_009, 009, , , , Crap 

 cooling see attachment of FIRRun003

Ped 009

Cal 005

Multi 6 raw mode

L5_n_side out of order

 

FIFO_FULL_ERROR starting at ~2000 events

Entry  Thu Nov 20 15:32:33 2014, Hao Yin, , HardwareRun, 010, , , , Crap 

same as hardware run 009

FIFO FULL ERROR starting at ~event 5000

Entry  Thu Nov 20 16:13:18 2014, Hao Yin, Belle SVD, HardwareRun, 011, , , , Crap 

cooled see appendix (FirRun003)

PedestalRun_009

multi 6 Raw Mode

FIFO size increased

 

 

FIFO FULL at  event ~27000

Entry  Thu Nov 20 22:11:06 2014, Hao Yin, Belle SVD, HardwareRun, 012, , , , Good 

cooled see appendix (FirRun003)

PedestalRun_009

multi 6 Raw Mode

FIFO size increased

Entry  Fri Nov 21 15:02:28 2014, Benedikt Würkner, Belle SVD, HardwareRun, 013, 1433, , , Unknown 

cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)
Zero_suppressed

Entry  Fri Nov 21 22:08:32 2014, Hao Yin, , PedestalRun, 013, 10000, , , Unknown 

correct mapping

cooled -25 °C

L3n deactivated

 

Entry  Fri Nov 21 15:03:08 2014, Benedikt Würkner, Belle SVD, HardwareRun, 014, 989, , , Unknown 

cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)
Zero_suppressed

Entry  Sun Nov 23 10:32:41 2014, Hao Yin, Belle SVD, PedestalRun, 016, 10000, , , Unknown 

Pedestal Run

room temperature (30C)

Bias scans planned

Entry  Fri Nov 21 15:07:24 2014, Benedikt Würkner, Belle SVD, HardwareRun, 019, 150948, 2014-11-21 02:41:55, 2014-11-21 10:11:02, Unknown 

cooled see appendix (FirRun003)
PedestalRun_010
multi 6 Raw Mode
FIFO size increased
L3n deactivated
100000 deadtime (CTRL TRG)

VME Error, overnight run

Entry  Sat Nov 22 11:37:16 2014, Benedikt Würkner, Belle SVD, HardwareRun, 036, 450378, 2014-11-22 1:00:00, 2014-11-22 10:27:54, Unknown SPS_Testbeam-Temp.xlsxScreen_Shot_2014-11-22_at_12.41.44.png

 Not completely cooled since cooling failed at 1:42 in the night

Bias voltage set to +-60V

Some error with event no17 or 18 leading to the data not being easily analysable requiring a hack in TuxOA

Pedestal_013 (cooled)

Noisefile: HardwareRun_036.noi

Entry  Sat Nov 22 15:31:49 2014, Hao Yin, Belle SVD, HardwareRun, 038, 43788, 2014-11-22 15:18:40, , Unknown 

Cooled down to -20

Bias voltage set to +-60V

Pedestal_013 (cooled)

Noisefile: HardwareRun_036.noi

Zero suppressed

Entry  Sun Nov 23 01:05:43 2014, Hao Yin, Belle SVD, HardwareRun, 039, 20000, 2014-11-22 15:18:40, , Crap 

Cooled down to -20

Bias voltage set to +-80V

Pedestal_013 (cooled)

Noisefile: HardwareRun_036.noi

 

Entry  Sun Nov 23 01:37:42 2014, Hao Yin, Belle SVD, HardwareRun, 040, 20000, 2014-11-23 01:37:00, , Unknown 

Bias voltage set to +-80V

Pedestal_015 (cooled)

"New" layout with no cooling (CO2 is no more)

Newly set values for APC Delay

New FIR Run 005

Temperature around 30 C

Bias: +-80V

Entry  Sun Nov 23 10:51:49 2014, Hao Yin, Belle SVD, HardwareRun, 042, 76863, , , Unknown Temp_23-11-14.PNG

Hardware Run +-40V Bias

Room Temperature

Pedestal 016

Zero Suppressed

Entry  Sun Nov 23 12:17:59 2014, Benedikt Würkner, Belle SVD, HardwareRun, 044, 20000, , , Unknown 

Hardware Run +-30V Bias

Room Temperature

Pedestal 017 (again marked all the bad strips)

Zero Suppressed

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