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  HEPHY logbook for testbeam at SPS June 2009  Not logged in ELOG logo
Message ID: 69     Entry time: Sat Aug 22 13:34:14 2009
Author: Christian Irmler 
Project: BELLE 
Subject: pedestal correction 31.8 MHz transparent mode (cooling?) 
Run Number: pedcorr005 
Events:  
StartTime: 22.08.2009 13:31:27 
EndTime: 22.08.2009 13:41:42 

Belle DUT, intcal
HV=80V, 31.8 MHz, beam off
1 sample, transparent mode
chiller set to 13 deg.


external 31.8 MHz clock

there was probably no water flow throught the pipe of the origami module during this run --> must be repeated!

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