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  Testbeam at DESY in 2023, Page 22 of 26  Not logged in ELOG logo
New entries since:Thu Jan 1 01:00:00 1970
ID Date Author Subject Run Number DUT Wafer HV Fluence Resistivity Beam Energy Rate Setting Particle Type Data t-Start t-Stop Duration_mindown
  466   Sat Jul 15 15:08:36 2023 tb-crewcooled unirradiated 1307RD50-MPW3unknown91unirradiated1.9K4.2Low Flux LowelectronGood15.07.2023 15:03:3615.07.2023 15:03:530
automatic log for run 1307
Comment:
thr = 1.09V, vnfb = 0
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.09
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
01 37 1 0 0 0 -1
01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
01 47 1 0 0 0 -1
01 48 1 0 0 0 -1
01 49 1 0 0 0 -1
01 50 1 0 0 0 -1
01 51 1 0 0 0 -1
01 52 1 0 0 0 -1
01 53 1 0 0 0 -1
01 54 1 0 0 0 -1
01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
02 01 1 0 0 0 -1
02 02 1 0 0 0 -1
02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
02 08 1 0 0 0 -1
02 09 1 0 0 0 -1
02 10 1 0 0 0 -1
02 11 1 0 0 0 -1
02 12 1 0 0 0 -1
02 13 1 0 0 0 -1
02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
02 18 1 0 0 0 -1
02 19 1 0 0 0 -1
02 20 1 0 0 0 -1
02 21 1 0 0 0 -1
02 22 1 0 0 0 -1
02 23 1 0 0 0 -1
02 24 1 0 0 0 -1
02 25 1 0 0 0 -1
02 26 1 0 0 0 -1
02 27 1 0 0 0 -1
02 28 1 0 0 0 -1
02 29 1 0 0 0 -1
02 30 1 0 0 0 -1
02 31 1 0 0 0 -1
02 32 1 0 0 0 -1
02 33 1 0 0 0 -1
02 34 1 0 0 0 -1
02 35 1 0 0 0 -1
02 36 1 0 0 0 -1
02 37 1 0 0 0 -1
02 38 1 0 0 0 -1
02 39 1 0 0 0 -1
02 40 1 0 0 0 -1
02 41 1 0 0 0 -1
02 42 1 0 0 0 -1
02 43 1 0 0 0 -1
02 44 1 0 0 0 -1
02 45 1 0 0 0 -1
02 46 1 0 0 0 -1
02 47 1 0 0 0 -1
02 48 1 0 0 0 -1
02 49 1 0 0 0 -1
02 50 1 0 0 0 -1
02 51 1 0 0 0 -1
02 52 1 0 0 0 -1
02 53 1 0 0 0 -1
02 54 1 0 0 0 -1
02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
02 57 1 0 0 0 -1
02 58 1 0 0 0 -1
02 59 1 0 0 0 -1
02 60 1 0 0 0 -1
02 61 1 0 0 0 -1
02 62 1 0 0 0 -1
02 63 1 0 0 0 -1
03 00 1 0 0 0 -1
03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
03 15 1 0 0 0 -1
03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 2276 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  496   Sun Jul 16 10:44:10 2023 tb-crewcooled unirradiated 1336RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 10:38:5416.07.2023 10:39:240
automatic log for run 1336
Comment:
only 3 top rows, cooled, thr = 1.00V
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.0
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
01 37 1 0 0 0 -1
01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
01 47 1 0 0 0 -1
01 48 1 0 0 0 -1
01 49 1 0 0 0 -1
01 50 1 0 0 0 -1
01 51 1 0 0 0 -1
01 52 1 0 0 0 -1
01 53 1 0 0 0 -1
01 54 1 0 0 0 -1
01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
02 01 1 0 0 0 -1
02 02 1 0 0 0 -1
02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
02 08 1 0 0 0 -1
02 09 1 0 0 0 -1
02 10 1 0 0 0 -1
02 11 1 0 0 0 -1
02 12 1 0 0 0 -1
02 13 1 0 0 0 -1
02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
02 18 1 0 0 0 -1
02 19 1 0 0 0 -1
02 20 1 0 0 0 -1
02 21 1 0 0 0 -1
02 22 1 0 0 0 -1
02 23 1 0 0 0 -1
02 24 1 0 0 0 -1
02 25 1 0 0 0 -1
02 26 1 0 0 0 -1
02 27 1 0 0 0 -1
02 28 1 0 0 0 -1
02 29 1 0 0 0 -1
02 30 1 0 0 0 -1
02 31 1 0 0 0 -1
02 32 1 0 0 0 -1
02 33 1 0 0 0 -1
02 34 1 0 0 0 -1
02 35 1 0 0 0 -1
02 36 1 0 0 0 -1
02 37 1 0 0 0 -1
02 38 1 0 0 0 -1
02 39 1 0 0 0 -1
02 40 1 0 0 0 -1
02 41 1 0 0 0 -1
02 42 1 0 0 0 -1
02 43 1 0 0 0 -1
02 44 1 0 0 0 -1
02 45 1 0 0 0 -1
02 46 1 0 0 0 -1
02 47 1 0 0 0 -1
02 48 1 0 0 0 -1
02 49 1 0 0 0 -1
02 50 1 0 0 0 -1
02 51 1 0 0 0 -1
02 52 1 0 0 0 -1
02 53 1 0 0 0 -1
02 54 1 0 0 0 -1
02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
02 57 1 0 0 0 -1
02 58 1 0 0 0 -1
02 59 1 0 0 0 -1
02 60 1 0 0 0 -1
02 61 1 0 0 0 -1
02 62 1 0 0 0 -1
02 63 1 0 0 0 -1
03 00 1 0 0 0 -1
03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
03 15 1 0 0 0 -1
03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 3610 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  497   Sun Jul 16 10:45:45 2023 tb-crewcooled unirradiated 1337RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 10:40:2216.07.2023 10:40:590
automatic log for run 1337
Comment:
only 3 top rows, cooled, thr = 1.00V,
noisy pixel
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.0
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
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... 3610 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  498   Sun Jul 16 10:48:39 2023 tb-crewcooled unirradiated 1338RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 10:43:2116.07.2023 10:43:530
automatic log for run 1338
Comment:
only 3 top rows, cooled, thr = 1.00V, another noisy pixel
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.0
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
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01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
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01 48 1 0 0 0 -1
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01 50 1 0 0 0 -1
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01 53 1 0 0 0 -1
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01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
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... 3611 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  500   Sun Jul 16 11:12:45 2023 tb-crewcooled unirradiated 1340RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 11:07:4516.07.2023 11:07:590
automatic log for run 1340
Comment:
only 3 top rows, cooled, thr = 0.92V
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = .92
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
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00 38 1 0 0 0 -1
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00 40 1 0 0 0 -1
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00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
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01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
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01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
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01 21 1 0 0 0 -1
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02 00 1 0 0 0 -1
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02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
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02 11 1 0 0 0 -1
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02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
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02 20 1 0 0 0 -1
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02 22 1 0 0 0 -1
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02 48 1 0 0 0 -1
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02 51 1 0 0 0 -1
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02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
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02 59 1 0 0 0 -1
02 60 1 0 0 0 -1
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02 63 1 0 0 0 -1
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03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
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03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 3612 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  501   Sun Jul 16 11:14:04 2023 tb-crewcooled unirradiated 1341RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 11:08:5916.07.2023 11:09:180
automatic log for run 1341
Comment:
only 3 top rows, cooled, thr = 0.98V, noisy
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = .98
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
01 37 1 0 0 0 -1
01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
01 47 1 0 0 0 -1
01 48 1 0 0 0 -1
01 49 1 0 0 0 -1
01 50 1 0 0 0 -1
01 51 1 0 0 0 -1
01 52 1 0 0 0 -1
01 53 1 0 0 0 -1
01 54 1 0 0 0 -1
01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
02 01 1 0 0 0 -1
02 02 1 0 0 0 -1
02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
02 08 1 0 0 0 -1
02 09 1 0 0 0 -1
02 10 1 0 0 0 -1
02 11 1 0 0 0 -1
02 12 1 0 0 0 -1
02 13 1 0 0 0 -1
02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
02 18 1 0 0 0 -1
02 19 1 0 0 0 -1
02 20 1 0 0 0 -1
02 21 1 0 0 0 -1
02 22 1 0 0 0 -1
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02 24 1 0 0 0 -1
02 25 1 0 0 0 -1
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02 27 1 0 0 0 -1
02 28 1 0 0 0 -1
02 29 1 0 0 0 -1
02 30 1 0 0 0 -1
02 31 1 0 0 0 -1
02 32 1 0 0 0 -1
02 33 1 0 0 0 -1
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02 35 1 0 0 0 -1
02 36 1 0 0 0 -1
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02 40 1 0 0 0 -1
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02 44 1 0 0 0 -1
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02 52 1 0 0 0 -1
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02 54 1 0 0 0 -1
02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
02 57 1 0 0 0 -1
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02 60 1 0 0 0 -1
02 61 1 0 0 0 -1
02 62 1 0 0 0 -1
02 63 1 0 0 0 -1
03 00 1 0 0 0 -1
03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
03 15 1 0 0 0 -1
03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 3612 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  502   Sun Jul 16 11:17:09 2023 tb-crewcooled unirradiated 1342RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 11:12:0716.07.2023 11:12:230
automatic log for run 1342
Comment:
only 3 top rows, cooled, thr = 0.98V, noisy pixel masked
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = .98
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
01 37 1 0 0 0 -1
01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
01 47 1 0 0 0 -1
01 48 1 0 0 0 -1
01 49 1 0 0 0 -1
01 50 1 0 0 0 -1
01 51 1 0 0 0 -1
01 52 1 0 0 0 -1
01 53 1 0 0 0 -1
01 54 1 0 0 0 -1
01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
02 01 1 0 0 0 -1
02 02 1 0 0 0 -1
02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
02 08 1 0 0 0 -1
02 09 1 0 0 0 -1
02 10 1 0 0 0 -1
02 11 1 0 0 0 -1
02 12 1 0 0 0 -1
02 13 1 0 0 0 -1
02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
02 18 1 0 0 0 -1
02 19 1 0 0 0 -1
02 20 1 0 0 0 -1
02 21 1 0 0 0 -1
02 22 1 0 0 0 -1
02 23 1 0 0 0 -1
02 24 1 0 0 0 -1
02 25 1 0 0 0 -1
02 26 1 0 0 0 -1
02 27 1 0 0 0 -1
02 28 1 0 0 0 -1
02 29 1 0 0 0 -1
02 30 1 0 0 0 -1
02 31 1 0 0 0 -1
02 32 1 0 0 0 -1
02 33 1 0 0 0 -1
02 34 1 0 0 0 -1
02 35 1 0 0 0 -1
02 36 1 0 0 0 -1
02 37 1 0 0 0 -1
02 38 1 0 0 0 -1
02 39 1 0 0 0 -1
02 40 1 0 0 0 -1
02 41 1 0 0 0 -1
02 42 1 0 0 0 -1
02 43 1 0 0 0 -1
02 44 1 0 0 0 -1
02 45 1 0 0 0 -1
02 46 1 0 0 0 -1
02 47 1 0 0 0 -1
02 48 1 0 0 0 -1
02 49 1 0 0 0 -1
02 50 1 0 0 0 -1
02 51 1 0 0 0 -1
02 52 1 0 0 0 -1
02 53 1 0 0 0 -1
02 54 1 0 0 0 -1
02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
02 57 1 0 0 0 -1
02 58 1 0 0 0 -1
02 59 1 0 0 0 -1
02 60 1 0 0 0 -1
02 61 1 0 0 0 -1
02 62 1 0 0 0 -1
02 63 1 0 0 0 -1
03 00 1 0 0 0 -1
03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
03 15 1 0 0 0 -1
03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 3613 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  504   Sun Jul 16 12:24:02 2023 tb-crewcooled unirradiated 1344RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 12:19:0316.07.2023 12:19:160
automatic log for run 1344
Comment:
smiley
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.15
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
05 13 1 0 0 0 -1
05 14 1 0 0 0 -1
05 15 1 0 0 0 -1
05 16 1 0 0 0 -1
05 17 1 0 0 0 -1
05 18 1 0 0 0 -1
05 19 1 0 0 0 -1
05 20 1 0 0 0 -1
05 21 1 0 0 0 -1
05 22 1 0 0 0 -1
05 23 1 0 0 0 -1
05 24 1 0 0 0 -1
05 25 1 0 0 0 -1
05 26 1 0 0 0 -1
05 27 1 0 0 0 -1
05 28 1 0 0 0 -1
05 29 1 0 0 0 -1
05 30 1 0 0 0 -1
05 31 1 0 0 0 -1
05 32 1 0 0 0 -1
05 33 1 0 0 0 -1
05 34 1 0 0 0 -1
05 35 1 0 0 0 -1
05 36 1 0 0 0 -1
05 37 1 0 0 0 -1
05 38 1 0 0 0 -1
05 39 1 0 0 0 -1
05 40 1 0 0 0 -1
05 41 1 0 0 0 -1
05 42 1 0 0 0 -1
05 43 1 0 0 0 -1
05 44 1 0 0 0 -1
05 45 1 0 0 0 -1
05 46 1 0 0 0 -1
05 47 1 0 0 0 -1
05 48 1 0 0 0 -1
05 49 1 0 0 0 -1
05 50 1 0 0 0 -1
05 51 1 0 0 0 -1
06 12 1 0 0 0 -1
06 13 1 0 0 0 -1
06 14 1 0 0 0 -1
06 15 1 0 0 0 -1
06 16 1 0 0 0 -1
06 17 1 0 0 0 -1
06 18 1 0 0 0 -1
06 19 1 0 0 0 -1
06 20 1 0 0 0 -1
06 21 1 0 0 0 -1
06 22 1 0 0 0 -1
06 23 1 0 0 0 -1
06 24 1 0 0 0 -1
06 25 1 0 0 0 -1
06 26 1 0 0 0 -1
06 27 1 0 0 0 -1
06 28 1 0 0 0 -1
06 29 1 0 0 0 -1
06 30 1 0 0 0 -1
06 31 1 0 0 0 -1
06 32 1 0 0 0 -1
06 33 1 0 0 0 -1
06 34 1 0 0 0 -1
06 35 1 0 0 0 -1
06 36 1 0 0 0 -1
06 37 1 0 0 0 -1
06 38 1 0 0 0 -1
06 39 1 0 0 0 -1
06 40 1 0 0 0 -1
06 41 1 0 0 0 -1
06 42 1 0 0 0 -1
06 43 1 0 0 0 -1
06 44 1 0 0 0 -1
06 45 1 0 0 0 -1
06 46 1 0 0 0 -1
06 47 1 0 0 0 -1
06 48 1 0 0 0 -1
06 49 1 0 0 0 -1
06 50 1 0 0 0 -1
06 51 1 0 0 0 -1
06 52 1 0 0 0 -1
07 11 1 0 0 0 -1
07 12 1 0 0 0 -1
07 13 1 0 0 0 -1
07 14 1 0 0 0 -1
07 15 1 0 0 0 -1
07 16 1 0 0 0 -1
07 17 1 0 0 0 -1
07 18 1 0 0 0 -1
07 19 1 0 0 0 -1
07 20 1 0 0 0 -1
07 21 1 0 0 0 -1
07 22 1 0 0 0 -1
07 23 1 0 0 0 -1
07 24 1 0 0 0 -1
07 25 1 0 0 0 -1
07 26 1 0 0 0 -1
07 27 1 0 0 0 -1
07 28 1 0 0 0 -1
07 29 1 0 0 0 -1
07 30 1 0 0 0 -1
07 31 1 0 0 0 -1
07 32 1 0 0 0 -1
07 33 1 0 0 0 -1
07 34 1 0 0 0 -1
07 35 1 0 0 0 -1
07 36 1 0 0 0 -1
07 37 1 0 0 0 -1
07 38 1 0 0 0 -1
07 39 1 0 0 0 -1
07 40 1 0 0 0 -1
07 41 1 0 0 0 -1
07 42 1 0 0 0 -1
07 43 1 0 0 0 -1
07 44 1 0 0 0 -1
07 45 1 0 0 0 -1
07 46 1 0 0 0 -1
07 47 1 0 0 0 -1
07 48 1 0 0 0 -1
07 49 1 0 0 0 -1
07 50 1 0 0 0 -1
07 51 1 0 0 0 -1
07 52 1 0 0 0 -1
07 53 1 0 0 0 -1
08 10 1 0 0 0 -1
08 11 1 0 0 0 -1
08 12 1 0 0 0 -1
08 13 1 0 0 0 -1
08 14 1 0 0 0 -1
08 50 1 0 0 0 -1
08 51 1 0 0 0 -1
08 52 1 0 0 0 -1
08 53 1 0 0 0 -1
08 54 1 0 0 0 -1
09 10 1 0 0 0 -1
09 11 1 0 0 0 -1
09 12 1 0 0 0 -1
09 13 1 0 0 0 -1
09 51 1 0 0 0 -1
09 52 1 0 0 0 -1
09 53 1 0 0 0 -1
09 54 1 0 0 0 -1
09 55 1 0 0 0 -1
10 08 1 0 0 0 -1
10 09 1 0 0 0 -1
10 10 1 0 0 0 -1
10 11 1 0 0 0 -1
10 12 1 0 0 0 -1
10 52 1 0 0 0 -1
10 53 1 0 0 0 -1
10 54 1 0 0 0 -1
10 55 1 0 0 0 -1
11 08 1 0 0 0 -1
11 09 1 0 0 0 -1
11 10 1 0 0 0 -1
11 11 1 0 0 0 -1
11 53 1 0 0 0 -1
11 54 1 0 0 0 -1
11 55 1 0 0 0 -1
52 08 1 0 0 0 -1
52 09 1 0 0 0 -1
52 10 1 0 0 0 -1
52 11 1 0 0 0 -1
52 52 1 0 0 0 -1
52 53 1 0 0 0 -1
52 54 1 0 0 0 -1
52 55 1 0 0 0 -1
53 08 1 0 0 0 -1
53 09 1 0 0 0 -1
53 10 1 0 0 0 -1
53 11 1 0 0 0 -1
53 52 1 0 0 0 -1
53 53 1 0 0 0 -1
53 54 1 0 0 0 -1
53 55 1 0 0 0 -1
54 08 1 0 0 0 -1
54 09 1 0 0 0 -1
54 10 1 0 0 0 -1
54 11 1 0 0 0 -1
54 52 1 0 0 0 -1
54 53 1 0 0 0 -1
54 54 1 0 0 0 -1
54 55 1 0 0 0 -1
55 08 1 0 0 0 -1
55 09 1 0 0 0 -1
55 10 1 0 0 0 -1
55 11 1 0 0 0 -1
55 52 1 0 0 0 -1
55 53 1 0 0 0 -1
55 54 1 0 0 0 -1
55 55 1 0 0 0 -1
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  1   Mon Jul 3 21:13:44 2023 tb-crewinitial tests commonunknown unirradiatedunknown1.0 ProtonUnknown   
test
  2   Mon Jul 3 21:14:28 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
tests
  5   Mon Jul 3 22:52:06 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
test
  7   Mon Jul 3 22:54:48 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
test
  8   Tue Jul 4 10:43:30 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
still testing without HV, don't expect hits
  11   Tue Jul 4 13:45:31 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
DUT biased, kind of aligned, hoping for the best
  13   Tue Jul 4 14:00:05 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronCrap   
increased thr to 1.3V
activity is "enabling" noise
  17   Tue Jul 4 14:54:46 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronUnknown   
deactivated piggy due to 1st sync issues
  20   Tue Jul 4 16:22:25 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronUnknown   
problems with automating elog
  30   Tue Jul 4 18:31:58 2023 tb-crewinitial tests RD50-MPW3unknown unirradiated1.9K4.2 electronUnknown   
playing around with threshold since a while (see Peary configs) as we don't see correlations yet (which might be hided in noise)
  33   Wed Jul 5 09:15:19 2023 Bernhard PilslChnged Settings RD50-MPW3           

Now enabled piggy again

  34   Wed Jul 5 09:41:53 2023 Bernhard Pilslchanged settings             

Just enabled a few pixels in piggy and base to reduce data

ELOG V3.1.5-fc6679b