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Full | Summary | Threaded     -- All entries -- Last day Last 3 Days Last week Last month Last 3 Months Last 6 Months Last Year -- Type -- Common Measurement -- Project -- SPS Testbeam June08 Belle II PixelFED -- Measurement Type -- hybrid module source system  64 Entries

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Selected entries:  Tracker Sensor QC HGC Sensor QC Process QC Longterm Visual Inspection Process QC OLD SQC PQC P3 HGC Klimakammer microscopes infrastructure test cleanroom lasersetup module assembly testbeam-MA2023 testbeam-MA2021 testbeam-MA2020 testbeam-MA2019 testbeam-RD50-DESY-Apr2024 testbeam-RD50-DESY-Jul2023 testbeam-RD50-CERN-Oct2022 testbeam-DESY-Oct2017 testbeam-DESY-April2017 testbeam-SPS2015 testbeam-SPS2014 testbeam-DESY14 testbeam-SPS12 testbeam-SPS11 testbeam-SPS10 testbeam-SPS09 testbeam-SPS08 LP-TPC SiDDaTA scratch testbeam-MA2018 testbeam-MA2024

ID Date Author Project Measurement Type Object ID Subject Text   64   Mon Nov 30 20:16:37 2015 Hao Yin Belle II system Hardware_Room_With_Cold_I2C   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001 ADC delay shifted by 3 (1.5ns)      65   Mon Nov 30 20:27:42 2015 Hao Yin Belle II system Hardware_Room_With_Cold_I2C   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001 ADC shifted by 5 (2.5ns) all sensors      67   Mon Nov 30 22:35:41 2015 Hao Yin Belle II system Hardware_Room_With_Cold_I2C   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001 ADC shifted by 9 (4.5ns) all sensors      60   Mon Nov 30 18:49:23 2015 Hao Yin Belle II system Hardware_Cold   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001 target: -Z      61   Mon Nov 30 19:01:54 2015 Hao Yin Belle II system Hardware_Cold   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns), FIRRun_Cold_001 Temp = 0°C      56   Mon Nov 30 17:47:54 2015 Hao Yin Belle II system HardwareRun002   ADC Hot, FIRRun001, PedestalRun001 target: -Z room temp pedrun      55   Mon Nov 30 17:23:51 2015 Hao Yin Belle II system HardwareRun001   ADC Hot, FIRRun001, PedestalRun001 room temp pedrun target: BW      58   Mon Nov 30 18:44:04 2015 Hao Yin Belle II system FIRRun_Cold   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns)        53   Mon Nov 30 17:11:17 2015 Hao Yin Belle II module FIRRun001 FIRRun001 aft ADC_HOT FirRun 20 min after I2C      39   Tue May 19 10:57:19 2015 Hao Yin Belle II system FIR FIR filter first fir filter run: # 1:[0x[FADC ID] in hex], 2:[APV25 ChannelNr], 3-10:[fir coef in float]      41   Tue May 19 13:23:16 2015 Hao Yin Belle II system Calibration CalibrationRun001 PedestalRun001, FIRRun001, room temperature, no noise injection      48   Mon May 25 20:27:23 2015 Hao Yin Belle II system Caen PS base line measurements   Baseline noise measurements wo injection. measure noise in both HV and LV. wings of APV25 using cmc with 128      49   Wed May 27 09:30:54 2015 Hao Yin Belle II system CAEN PS Primary side   Measured Primary side of caen wo load (setup attachment 2 and prelimilary res. attachment 1. )      52   Mon Nov 30 15:18:12 2015 Hao Yin Belle II module ADC_DELAY_HOT ADC delay hot ADC delay scan at room temp and 20 min after APV I2C config. measured values at display in the      57   Mon Nov 30 18:32:13 2015 Hao Yin Belle II system ADC Delay Scan Cold   ADC Cold diff to hot: 1-3 adc delay config (max 1.5 ns)      16   Wed Oct 7 14:24:06 2009 Dieter Uhl BELLE Upgrade hybrid #5 hybrid-pitchadapter shorts at upper coat      15   Wed Oct 7 14:23:35 2009 Dieter Uhl BELLE Upgrade hybrid #4 hybrid-pitchadapter opens at upper coat      37   Tue May 19 09:31:50 2015 Hao Yin       Noise Test ITA Everything works except L3 p-side. The config file is shown in the following:      38   Tue May 19 10:08:53 2015 Hao Yin       FADC system setup success 3 FADC. All Channel/APV25 running (except L3 n first and last -> not connected (bonding)) n-side: all connectors      42   Tue May 19 13:42:04 2015 Hao Yin       L6 Noise inJection Setup Test Nr. 1: RLC between DockBox and Hybrid (both side).

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