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  Testbeam at DESY in 2023, Page 26 of 26  Not logged in ELOG logo
ID Date Author Subject Run Number DUTdown Wafer HV Fluence Resistivity Beam Energy Rate Setting Particle Type Data t-Start t-Stop Duration_min
  507   Sun Jul 16 16:06:30 2023 tb-crewdara taking1347RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood16.07.2023 14:16:5016.07.2023 16:01:44104
automatic log for run 1347
Comment:
as before but with freeze mode (compare us Smile )
Attachment 1: peary_config.cfg
#This config file was generated with the "MPW3_gui - Config Creator"
#Do not change comment lines like "SEC::xxx" !
#They are needed for parsing

[RD50_MPW3]
this_config_file = config_piggy_new.cfg
#SEC::MISC
accept_tlu_trigger = 0
enable_readout = 1
calib_file_base = calib_base.txt
config_si5345 = clock_config.txt
execute_file = execute.txt
i2c_addr_base = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_base.txt
dcol_hb = 5
disable_clk = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 0 
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36


#SEC::POWER
# voltages with suffix "__u", currents with "__i"
bl__u = 0.9
bl__i = 3
del_hi__u = 0.7
del_hi__i = 3
del_lo__u = 0.9
del_lo__i = 3
p1v3_vssa__u = 1.3
p1v3_vssa__i = 3
p1v8_nw_ring__u = 1.8
p1v8_nw_ring__i = 3
p1v8_vdd!__u = 1.8
p1v8_vdd!__i = 3
p1v8_vdda__u = 1.8
p1v8_vdda__i = 3
p1v8_vddc__u = 1.8
p1v8_vddc__i = 3
p1v8_vsensbus__u = 1.8
p1v8_vsensbus__i = 3
p2v5d__u = 2.5
p2v5d__i = 3
th__u = 1.2
th__i = 3

[RD50_MPW3_Piggy]
this_config_file = config_piggy_new.cfg
#SEC::MISC
calib_file = calib_piggy.txt
execute_file = execute.txt
i2c_addr = 0x41
i2c_dev = /dev/i2c-9
matrix_config = matrix_config_piggy.txt
piggy_attached = 0


#SEC::REGISTERS
conf_reg_ts_ctrl = 0
conf_reg_ts_ini = 0
cu_ctrl = 0
en_ext_ctrl = 0
en_ser_out_dcol = 0
en_sfout_dcol = 0
idle0 = 251
idle1 = 247
idle2 = 247
idle3 = 247
tx_ctrl = 0
vbfb = 38
vblr = 38
vn = 21
vnfb = 18
vnsensbias = 50
vnsf = 45
vpbias = 37
vpcomp = 19
vptrim = 36
Attachment 2: matrix_config_base.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
00 00 1 0 0 0 -1
00 01 1 0 0 0 -1
00 02 1 0 0 0 -1
00 03 1 0 0 0 -1
00 04 1 0 0 0 -1
00 05 1 0 0 0 -1
00 06 1 0 0 0 -1
00 07 1 0 0 0 -1
00 08 1 0 0 0 -1
00 09 1 0 0 0 -1
00 10 1 0 0 0 -1
00 11 1 0 0 0 -1
00 12 1 0 0 0 -1
00 13 1 0 0 0 -1
00 14 1 0 0 0 -1
00 15 1 0 0 0 -1
00 16 1 0 0 0 -1
00 17 1 0 0 0 -1
00 18 1 0 0 0 -1
00 19 1 0 0 0 -1
00 20 1 0 0 0 -1
00 21 1 0 0 0 -1
00 22 1 0 0 0 -1
00 23 1 0 0 0 -1
00 24 1 0 0 0 -1
00 25 1 0 0 0 -1
00 26 1 0 0 0 -1
00 27 1 0 0 0 -1
00 28 1 0 0 0 -1
00 29 1 0 0 0 -1
00 30 1 0 0 0 -1
00 31 1 0 0 0 -1
00 32 1 0 0 0 -1
00 33 1 0 0 0 -1
00 34 1 0 0 0 -1
00 35 1 0 0 0 -1
00 36 1 0 0 0 -1
00 37 1 0 0 0 -1
00 38 1 0 0 0 -1
00 39 1 0 0 0 -1
00 40 1 0 0 0 -1
00 41 1 0 0 0 -1
00 42 1 0 0 0 -1
00 43 1 0 0 0 -1
00 44 1 0 0 0 -1
00 45 1 0 0 0 -1
00 46 1 0 0 0 -1
00 47 1 0 0 0 -1
00 48 1 0 0 0 -1
00 49 1 0 0 0 -1
00 50 1 0 0 0 -1
00 51 1 0 0 0 -1
00 52 1 0 0 0 -1
00 53 1 0 0 0 -1
00 54 1 0 0 0 -1
00 55 1 0 0 0 -1
00 56 1 0 0 0 -1
00 57 1 0 0 0 -1
00 58 1 0 0 0 -1
00 59 1 0 0 0 -1
00 60 1 0 0 0 -1
00 61 1 0 0 0 -1
00 62 1 0 0 0 -1
00 63 1 0 0 0 -1
01 00 1 0 0 0 -1
01 01 1 0 0 0 -1
01 02 1 0 0 0 -1
01 03 1 0 0 0 -1
01 04 1 0 0 0 -1
01 05 1 0 0 0 -1
01 06 1 0 0 0 -1
01 07 1 0 0 0 -1
01 08 1 0 0 0 -1
01 09 1 0 0 0 -1
01 10 1 0 0 0 -1
01 11 1 0 0 0 -1
01 12 1 0 0 0 -1
01 13 1 0 0 0 -1
01 14 1 0 0 0 -1
01 15 1 0 0 0 -1
01 16 1 0 0 0 -1
01 17 1 0 0 0 -1
01 18 1 0 0 0 -1
01 19 1 0 0 0 -1
01 20 1 0 0 0 -1
01 21 1 0 0 0 -1
01 22 1 0 0 0 -1
01 23 1 0 0 0 -1
01 24 1 0 0 0 -1
01 25 1 0 0 0 -1
01 26 1 0 0 0 -1
01 27 1 0 0 0 -1
01 28 1 0 0 0 -1
01 29 1 0 0 0 -1
01 30 1 0 0 0 -1
01 31 1 0 0 0 -1
01 32 1 0 0 0 -1
01 33 1 0 0 0 -1
01 34 1 0 0 0 -1
01 35 1 0 0 0 -1
01 36 1 0 0 0 -1
01 37 1 0 0 0 -1
01 38 1 0 0 0 -1
01 39 1 0 0 0 -1
01 40 1 0 0 0 -1
01 41 1 0 0 0 -1
01 42 1 0 0 0 -1
01 43 1 0 0 0 -1
01 44 1 0 0 0 -1
01 45 1 0 0 0 -1
01 46 1 0 0 0 -1
01 47 1 0 0 0 -1
01 48 1 0 0 0 -1
01 49 1 0 0 0 -1
01 50 1 0 0 0 -1
01 51 1 0 0 0 -1
01 52 1 0 0 0 -1
01 53 1 0 0 0 -1
01 54 1 0 0 0 -1
01 55 1 0 0 0 -1
01 56 1 0 0 0 -1
01 57 1 0 0 0 -1
01 58 1 0 0 0 -1
01 59 1 0 0 0 -1
01 60 1 0 0 0 -1
01 61 1 0 0 0 -1
01 62 1 0 0 0 -1
01 63 1 0 0 0 -1
02 00 1 0 0 0 -1
02 01 1 0 0 0 -1
02 02 1 0 0 0 -1
02 03 1 0 0 0 -1
02 04 1 0 0 0 -1
02 05 1 0 0 0 -1
02 06 1 0 0 0 -1
02 07 1 0 0 0 -1
02 08 1 0 0 0 -1
02 09 1 0 0 0 -1
02 10 1 0 0 0 -1
02 11 1 0 0 0 -1
02 12 1 0 0 0 -1
02 13 1 0 0 0 -1
02 14 1 0 0 0 -1
02 15 1 0 0 0 -1
02 16 1 0 0 0 -1
02 17 1 0 0 0 -1
02 18 1 0 0 0 -1
02 19 1 0 0 0 -1
02 20 1 0 0 0 -1
02 21 1 0 0 0 -1
02 22 1 0 0 0 -1
02 23 1 0 0 0 -1
02 24 1 0 0 0 -1
02 25 1 0 0 0 -1
02 26 1 0 0 0 -1
02 27 1 0 0 0 -1
02 28 1 0 0 0 -1
02 29 1 0 0 0 -1
02 30 1 0 0 0 -1
02 31 1 0 0 0 -1
02 32 1 0 0 0 -1
02 33 1 0 0 0 -1
02 34 1 0 0 0 -1
02 35 1 0 0 0 -1
02 36 1 0 0 0 -1
02 37 1 0 0 0 -1
02 38 1 0 0 0 -1
02 39 1 0 0 0 -1
02 40 1 0 0 0 -1
02 41 1 0 0 0 -1
02 42 1 0 0 0 -1
02 43 1 0 0 0 -1
02 44 1 0 0 0 -1
02 45 1 0 0 0 -1
02 46 1 0 0 0 -1
02 47 1 0 0 0 -1
02 48 1 0 0 0 -1
02 49 1 0 0 0 -1
02 50 1 0 0 0 -1
02 51 1 0 0 0 -1
02 52 1 0 0 0 -1
02 53 1 0 0 0 -1
02 54 1 0 0 0 -1
02 55 1 0 0 0 -1
02 56 1 0 0 0 -1
02 57 1 0 0 0 -1
02 58 1 0 0 0 -1
02 59 1 0 0 0 -1
02 60 1 0 0 0 -1
02 61 1 0 0 0 -1
02 62 1 0 0 0 -1
02 63 1 0 0 0 -1
03 00 1 0 0 0 -1
03 01 1 0 0 0 -1
03 02 1 0 0 0 -1
03 03 1 0 0 0 -1
03 04 1 0 0 0 -1
03 05 1 0 0 0 -1
03 06 1 0 0 0 -1
03 07 1 0 0 0 -1
03 08 1 0 0 0 -1
03 09 1 0 0 0 -1
03 10 1 0 0 0 -1
03 11 1 0 0 0 -1
03 12 1 0 0 0 -1
03 13 1 0 0 0 -1
03 14 1 0 0 0 -1
03 15 1 0 0 0 -1
03 16 1 0 0 0 -1
03 17 1 0 0 0 -1
03 18 1 0 0 0 -1
03 19 1 0 0 0 -1
03 20 1 0 0 0 -1
03 21 1 0 0 0 -1
03 22 1 0 0 0 -1
03 23 1 0 0 0 -1
03 24 1 0 0 0 -1
03 25 1 0 0 0 -1
03 26 1 0 0 0 -1
03 27 1 0 0 0 -1
03 28 1 0 0 0 -1
03 29 1 0 0 0 -1
03 30 1 0 0 0 -1
03 31 1 0 0 0 -1
03 32 1 0 0 0 -1
03 33 1 0 0 0 -1
03 34 1 0 0 0 -1
03 35 1 0 0 0 -1
03 36 1 0 0 0 -1
03 37 1 0 0 0 -1
03 38 1 0 0 0 -1
03 39 1 0 0 0 -1
03 40 1 0 0 0 -1
03 41 1 0 0 0 -1
03 42 1 0 0 0 -1
03 43 1 0 0 0 -1
03 44 1 0 0 0 -1
03 45 1 0 0 0 -1
03 46 1 0 0 0 -1
03 47 1 0 0 0 -1
03 48 1 0 0 0 -1
03 49 1 0 0 0 -1
03 50 1 0 0 0 -1
03 51 1 0 0 0 -1
03 52 1 0 0 0 -1
03 53 1 0 0 0 -1
03 54 1 0 0 0 -1
03 55 1 0 0 0 -1
03 56 1 0 0 0 -1
03 57 1 0 0 0 -1
03 58 1 0 0 0 -1
03 59 1 0 0 0 -1
03 60 1 0 0 0 -1
03 61 1 0 0 0 -1
03 62 1 0 0 0 -1
03 63 1 0 0 0 -1
04 00 1 0 0 0 -1
04 01 1 0 0 0 -1
04 02 1 0 0 0 -1
04 03 1 0 0 0 -1
04 04 1 0 0 0 -1
04 05 1 0 0 0 -1
04 06 1 0 0 0 -1
04 07 1 0 0 0 -1
04 08 1 0 0 0 -1
04 09 1 0 0 0 -1
04 10 1 0 0 0 -1
04 11 1 0 0 0 -1
04 12 1 0 0 0 -1
04 13 1 0 0 0 -1
04 14 1 0 0 0 -1
04 15 1 0 0 0 -1
04 16 1 0 0 0 -1
04 17 1 0 0 0 -1
04 18 1 0 0 0 -1
04 19 1 0 0 0 -1
04 20 1 0 0 0 -1
04 21 1 0 0 0 -1
04 22 1 0 0 0 -1
04 23 1 0 0 0 -1
04 24 1 0 0 0 -1
04 25 1 0 0 0 -1
04 26 1 0 0 0 -1
04 27 1 0 0 0 -1
04 28 1 0 0 0 -1
04 29 1 0 0 0 -1
04 30 1 0 0 0 -1
04 31 1 0 0 0 -1
04 32 1 0 0 0 -1
04 33 1 0 0 0 -1
04 34 1 0 0 0 -1
04 35 1 0 0 0 -1
04 36 1 0 0 0 -1
04 37 1 0 0 0 -1
... 1690 more lines ...
Attachment 3: matrix_config_piggy.txt
# Config-File of the Pixel-Matrix; generated by MPW3-Config-Creator
# each line represents the configuration of an individual pixel
# format: {row} {col} {mask} {en_inj} {hb_en} {en_sfout} {TDAC}

# default values (which are not printed) are:
# {row} {col} 0 0 0 0 -1
Attachment 4: eudaq_config.cfg
[RunControl]
EUDAQ_CTRL_PRODUCER_LAST_START = aida_tlu

[LogCollector.log]

[Producer.aida_tlu]
verbose = 0
confid = 20181002
skipconf = 0

# delay start in ms
delayStart = 0

####################################################
# DUT IN/OUTPUT

# Mask: 0 CONT, 1 SPARE, 2 TRIG, 3 BUSY (1 = driven by TLU, 0 = driven by DUT) 
# EUDET mode: 7
HDMI1_set = 0x7
HDMI2_set = 0x7
HDMI3_set = 0x7
HDMI4_set = 0x7

# same as above for the clock line, 1 = AIDA mode, 2 = FPGA 
HDMI1_clk = 1
HDMI2_clk = 0
HDMI3_clk = 1
HDMI4_clk = 1
LEMOclk = 1   # if input, then also adjust clk.txt

# Activate channels
# Only TLU
#DUTMask = 0x0
# Telescope at HDMI1
#DUTMask = 0x1
# Only FEI4 at HDMI2
#DUTMask = 0x2
# Telescope at HDMI1, FEI4 at HDMI2
#DUTMask = 0x3
#Adenium at HDMI3
#DUTMask = 0x1

#Adenium at HDMI1,  MPW3 at HDMI3, Monopix2 at HDMI4
DUTMask = 0xD

# Define mode: 
# Each DUT channel has two bits: HDMI1=0&1 bit; HDMI2= 2&3bit; ...
# Only the lowest bit is significant:
# AIDA mode for each "1st" LSbit = 1
# EUDET modes incl. DUT clocking out each "1st" LSbit = 0
# e.g. 1st and 2nd channel in EUDET mode: 0xF0
#DUTMaskMode = 0xF0 # 1st and 2nd channel are reading out Trigger ID
# e.g. only 1st in EUDET mode
#DUTMaskMode = 0xFC # 1st is reading out Trigger ID

#!!!!!!!!!!!! Check this !!!!!!!!!!!!!!!
#DUTMaskMode = 0x01 #I think this is AIDA mode for channel 3 and reading out trigger number

#HDMI3 on AIDA with trigger number
#DUTMaskMode = 0x31
#HDMI3+4 on AIDA with trigger number
DUTMaskMode = 0xF1

# "Mixed mode" to ignore a busy line from a DUT
# TLU ignores the telescope busy (at HDMI1)
#DUTIgnoreBusy = 0x1 # yes (default, Mixed mode)
DUTIgnoreBusy = 0xA #no (EUDET mode)

###################################################
# ONLY AUTOTRIGGER 
#InternalTriggerFreq = 100


# EXTERNAL TRIGGER INPUTs
# Stretch, delay in 6.25ns ticks
in0_STR = 7  # factor to stretch the width of the signal; to get coincidence 
in0_DEL = 0  # factor to delay, e.g. compensate  
in1_STR = 7
in1_DEL = 0
in2_STR = 7
in2_DEL = 0
in3_STR = 7
in3_DEL = 0
in4_STR = 0
in4_DEL = 0
in5_STR = 0
in5_DEL = 0

# DAC INPUT THRESHOLD in V
DACThreshold0 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold1 = -0.4  # Was -0.04, but we get amplyfied signal from NIM module
DACThreshold2 = -0.20
DACThreshold3 = -0.20
DACThreshold4 = -0.20
DACThreshold5 = -0.20

# PMT Power
PMT1_V = 0.80
PMT2_V = 0.80
PMT3_V = 0.80
PMT4_V = 0.80

# 2 words 32bit: Hi + Lo
# combinations of coincidence are now possible! 

# Coincidence of input 0 to 3 (telescope)
#trigMaskHi = 0x00000000
#trigMaskLo = 0x00008000

# Coincidence of input 0 and 1
trigMaskHi = 0x00000000
trigMaskLo = 0x00000008

# New: Coincidence of any 3 of 4, 4 combinations plus all 4
#trigMaskHi = 0x00000000
#trigMaskLo = 0x0000C880

# EUDAQ2
# Define the data collector to be used by the producer
EUDAQ_DC = dc_tlu



[DataCollector.dc_tlu]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=5
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_tlu$X"
DISABLE_PRINT = 1

################################### Adenium #####################################
[Producer.altel]
EUDAQ_ID=1
EUDAQ_DC=dc_tel


[DataCollector.dc_tel]
EUDAQ_ID=100
EUDAQ_MN=StdEventMonitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION=1
EUDAQ_FW = native
EUDAQ_FW_PATTERN = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_adenium$X"
DISABLE_PRINT = 1

################################### MPW3 #####################################

[Producer.RD50_MPW3]


[DataCollector.mpw3_dc]
# connection to the monitor
EUDAQ_MN = mpw3_mon
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_mpw3$X
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100
# config-parameters
DISABLE_PRINT = 1
XILINX_IP = 192.168.201.1
SYNC_MODE = 0

[Monitor.mpw3_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[Producer.elog_mpw3]

# command (shell script) to execute before starting a run
start_cmd = "./copy_configs.sh" 

#files to attach to the Elog entry
files2log = "tmp/peary_config.cfg, tmp/matrix_config_base.txt, tmp/matrix_config_piggy.txt, tmp/eudaq_config.cfg" 



################################################ MPX2 #####################################################


[Producer.monopix2]
# connection to the data collector
EUDAQ_DC = dc_mpx2
ENABLE_BDAQ_RECORD = 1
ENABLE_HITOR = 1

# W08R19
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_113951_threshold_scan_interpreted.h5
#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/20230708_095321_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/masked_pixels.yaml

#CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/HV_THR25_HVCasc_THR22_10V/intermediate/20230630_132140_threshold_scan_interpreted.h5
#MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_CONFIG_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W08R19/NormalCascFE_THR25_6V/20230630_112801_global_threshold_tuning_interpreted.h5
MASKED_PIXELS_FILE = /media/bellevtx01/TOSHIBA EXT/configs/tuning/W02R09/masked_pixels.yaml

CHIP_SN = W02R09
CHIP_CMD_CLK = 160.0

#VCLIP = 255
#IBIAS = 100

# W02R09 HV FE
#ITHR = 32
#VRESET = 100
#VCASP = 40
#IBIAS = 50
#ICASN = 0
#ITUNE = 100
#VCASC = 150

# W02R09 NFE
#ITHR = 50
#VRESET = 
#VCASP = 
#IBIAS = 80
ICASN = 4
ITUNE = 0
#VCASC = 164

#overriding values in "scan_configuration"
#when none given default ones are being used
START_ROW = 0
STOP_ROW = 512
START_COLUMN = 100
STOP_COLUMN = 224
WAIT_FOR_FPGA = 1

CONFIG_ID = 46
ELOG_CATEGORY =  Debug #  Debug, Beam, VoltageScan, Scan
COMMENT_IN_CONF = "PWELL = 5V PSUB = 6V, neutron-irradiated chip, non-local-tuned settings for Vienna chip, NF, unknown thr, 0 deg"
ELOG_OUTPUT_PATH = "/media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs"

[Producer.hameg] 
HV = 3
BIAS = 6
SERIAL_PORT = /dev/ttyUSB0

[Monitor.monopix2_mon]
ENABLE_PRINT = 0
ENABLE_STD_PRINT = 0
ENABLE_STD_CONVERTER = 1
FORWARD2GUI = 1

[DataCollector.dc_mpx2]
# connection to the monitor
EUDAQ_MN = monopix2_mon
EUDAQ_FW = native
#path to store .raw file to, $3R is replaced by 3 digit run number, $12D -> 12 character date, $X -> .raw
EUDAQ_FW_PATTERN = /media/bellevtx01/TOSHIBA EXT/VTX/data_producer_runs/desy/run$6R_monopix2$X
#fraction of events being sent to the monitor
EUDAQ_DATACOL_SEND_MONITOR_FRACTION = 100

# config-parameters
#disable output of event to bash, is spamming terminal otherwise
DISABLE_PRINT = 1

[Producer.tpx3]
threshold = 1185
XMLConfig = /home/silicon/mpw3/spidr3_eudaq_operation/config_W2_E5_test_masked.t3x
external_clock = 1
EUDAQ_DC = spidr_dc

[DataCollector.spidr_dc]
EUDAQ_FW = native
EUDAQ_FW_PATTERN = /media/silicon/backup/desy_jul23/run$6R_tpx3$X
DISABLE_PRINT = 1
  508   Sun Jul 16 16:07:21 2023 tb-crewcooled unirradiated  RD50-MPW3unknown90unirradiated1.9K4.2Low Flux LowelectronGood   
End of success
Cheers from DESY TB22
Bernhard, Sam, Uwe
  34   Wed Jul 5 09:41:53 2023 Bernhard Pilslchanged settings             

Just enabled a few pixels in piggy and base to reduce data

  58   Wed Jul 5 16:21:36 2023 Bernhard Pilslbugfindingdeactivated injection again            
  77   Wed Jul 5 18:22:27 2023 Bernhard Pilsldrastic strategy change             

Running with Sync-Mode 0 now => Trying timestamps again

  140   Thu Jul 6 13:20:39 2023 Bernhard Pilslchanged back to AIDA with trigger             

FW and eudaq config

  256   Sat Jul 8 18:32:37 2023 Bernhard Pilslt0 found             

t0 seems to be in the data stream since ~ run 1010

  350   Wed Jul 12 13:30:29 2023 Bernhard PilslFW update             

Pure Base and Piggy frames get pushed into UDP packages

ELOG V3.1.5-fc6679b